PCB design: ESD shields and guard rings.
This short post is dedicated to hardware enthusiasts, who design their custom boards/dev kits/breakout boards/etc., and who are looking for some improvements regarding the ESD protection and handling. Techniques presented below have evaluated throughout different projects and multiple discussions with other designers.
When starting a project or simply experimenting with new technologies, I like to design development kits with many test points, variations of connections, and easy access to almost every component. All of this is to make work easier and to reduce the risk of some unpredicted things (such as noise, component overheating, crosstalk, or multimeter falling my knee) from happening. For me, such dev kits become reference designs for future iterations (which are significantly miniaturized and compact).
One of the things which I often use in such designs is an ESD protection using an ESD shield/guard ring. When developing new products, there can some playing around with the hardware, debugging, measuring, etc. Having proper ESD protection can save us some bucks and time, so we don’t have to assembly new units or search for new ICs. If for some reason, our circuit survives the ESD event, then the ESD itself still might introduce a significant voltage bounce on our GND planes, which then can couple to other conductors and disrupt our measurements.
Schematic and PCB design
The schematic consists of the following, simple section which makes my PCB design use two groundings. Those groundings are connected by a TVS diode (an ESD protection diode), and a 0R resistor (to make the grounding connect in a single point). By using such a simple circuit on a schematic, I will not forget about doing the ESD shield in my design and the ESD energy can be “guided” to the TVS diode.
The ESD shield (GND_CHASIS net) is routed around the PCB. Those tracks/polygons must be exposed to work as intended.
If anyone picks up the PCB and the ESD occurs, this energy will be guided to the ESD protection section (TVS diode), without damaging/disrupting the circuit. Other shieldings and housings shall be connected to the GND_CHASIS as well (e.g. USB connector shielding).
Placement of the TVS diode plays a critical role here. This diode should “catch” the ESD energy before it reaches our 0R resistor and returns e.g. to our power supply source.
In my future projects, I’m going to make another improvement, which is rounded corners. According to the following document from Texas Instruments:
when an ESD event occurs, there is a big difference between the trace’s shape by the means of radiated EMI.
I strongly encourage you to take a look at the TI’s document, as it shows more interesting aspects of the PCB layout for ESD dissipation. That’s it for this post. What kinds of protection do you use when developing new products?